Intel has demonstrated a new specialized chip called Heracles that accelerates fully homomorphic encryption (FHE) tasks by up to 5,000 times compared to standard server CPUs. Presented at the IEEE International Solid-State Circuits Conference (ISSCC) in San Francisco, the 3-nanometer chip enables secure, large-scale computing on encrypted data without the need for decryption.
The Heracles chip addresses a fundamental bottleneck in cybersecurity: the extreme computational cost of processing data while it remains encrypted. While fully homomorphic encryption allows for privacy-preserving computations, it traditionally requires thousands of times more processing power than working with unencrypted data. Intel’s new architecture aims to close this gap, making secure cloud computing and private AI processing more practical for real-world applications.
How much faster is the Intel Heracles chip?
During live demonstrations at ISSCC, the Heracles chip showed a massive performance advantage over traditional processors. In a simulated privacy query—where a voter checks if their ballot was correctly registered in an encrypted database without revealing their identity—the speed difference was stark. An Intel Xeon server CPU required 15 milliseconds to complete the task, whereas Heracles finished in just 14 microseconds.
While a millisecond difference may seem negligible in isolation, the cumulative impact at scale is significant. According to Intel, verifying 100 million voter ballots would take an Intel Xeon CPU more than 17 days to process. The Heracles chip could complete that same workload in approximately 23 minutes. Sanu Mathew, who leads security circuits research at Intel, noted that the chip’s ability to operate at this scale is a primary differentiator, stating, “Heracles is the first hardware that works at scale.”
The performance variance depends on the specific operation being performed. Intel reported that for the chip’s critical mathematical transformations, Heracles—operating at 1.2 gigahertz—offered a 2,355-fold improvement over a 3.5 GHz Intel Xeon CPU. Across seven key operations, the speedup ranged from 1,074 to 5,547 times faster, a result Mathew attributes to the balance between “the movement of data with the crunching of numbers.”
What makes FHE computing so difficult for standard processors?
Fully homomorphic encryption is a mathematical method that allows operations to be performed on ciphertexts, producing an encrypted result that, when decrypted, matches the result of operations performed on the original plaintext. However, this security comes with two major technical hurdles: data expansion and computational complexity.
Anupam Golder, a research scientist at Intel’s circuits research lab, explained to engineers at ISSCC that FHE causes an explosion in data size. While standard encryption typically results in ciphertext of a similar size to the plaintext, FHE produces data that is orders of magnitude larger. This massive volume of data places an immense strain on memory bandwidth and data movement within a processor.
Furthermore, the mathematical operations required for FHE are not optimized for general-purpose hardware. FHE relies on specialized processes such as “twiddling,” “automorphism,” and a noise-cancelling procedure known as “bootstrapping.” Standard CPUs struggle because integer addition and multiplication can take roughly 10,000 more clock cycles in an FHE environment. Meanwhile, Graphics Processing Units (GPUs), which excel at parallel operations, often lack the high-level precision required for these massive, complex numbers.
Ro Cammarota, who led the Heracles project at Intel until last December and is now at the University of California, Irvine, noted that the project was a “whole system-level effort” initiated five years ago under a Defense Advanced Research Projects Agency (DARPA) program. The goal was to move beyond software “cheats” and build hardware specifically designed for these mathematical burdens.
How does the Heracles architecture function?
The Heracles chip is built using Intel’s 3-nanometer FinFET technology and features a design optimized for high-speed, parallel mathematical processing. At its core, the chip contains 64 compute cores, referred to as “tile-pairs,” arranged in an eight-by-eight grid. These cores function as single instruction multiple data (SIMD) compute engines, allowing the chip to perform polynomial math and other FHE-specific tasks in parallel.
To manage the massive data requirements, Intel utilized several advanced hardware strategies:
- High-Bandwidth Memory (HBM): The chip is flanked by two 24-gigabyte HBM chips within a liquid-cooled package, providing 48 GB of total high-bandwidth memory.
- Data Throughput: The architecture utilizes 819-GB-per-second connections to feed data to the cores, with an on-chip 2D mesh network providing 9.6 terabytes per second of internal data flow.
- 32-bit Arithmetic: Rather than using standard 64-bit words, the Intel team utilized 32-bit arithmetic circuits to maintain precision while increasing speed and parallelism.
- Synchronized Instruction Streams: To prevent data movement from stalling computation, the chip runs three simultaneous instruction streams: one for moving data on and off the processor, one for internal movement, and one dedicated to mathematical operations.
The chip also includes 64 megabytes of cache memory, a capacity that exceeds the cache found in Nvidia’s Hopper-generation GPUs, to help manage the rapid flow of data through the 64-core array.
Who are the main competitors in the FHE accelerator race?
While Intel has demonstrated significant scale, several startups are racing to commercialize FHE hardware for different market segments. The competition is divided between those focusing on specialized hardware and those focusing on software-driven encrypted queries.
Duality Technology, a firm specializing in FHE software, is currently focused on products that facilitate encrypted queries. Kurt Rohloff, Duality’s chief technology officer, remarked that while specialized hardware may not be necessary for current scales, it will become essential for “emerging applications around deeper machine-learning-oriented operations like neural net, LLMs, or semantic search.” Duality previously demonstrated an FHE-encrypted version of the BERT transformer model.
Niobium Microsystems, a startup spun out of a DARPA competitor, is targeting the cloud and AI infrastructure market. Unlike Intel, which has not stated specific commercial plans, Niobium aims to produce the “world’s first commercially viable FHE accelerator.” The company recently announced a deal worth 10 billion South Korean won (approximately US $6.9 million) with Seoul-based chip design firm Semifive to develop an accelerator for fabrication using Samsung Foundry’s 8-nanometer-process technology.
Other players in the field include:
- Optalysics: This company is pursuing a photonic approach, using the physics of light to handle FHE’s compute-intensive transform steps. CEO Nick New stated that a full 3D-stacked commercial photonic chip could be ready in two to three years.
- Cornami and Fabric Cryptography: Both companies are actively developing hardware solutions to accelerate FHE computations.
Comparison of FHE Acceleration Approaches
| Entity | Primary Approach | Target Application | Technology/Status |
|---|---|---|---|
| Intel (Heracles) | Digital SIMD Accelerator | Large-scale secure computing | 3nm FinFET (Research/Demo) |
| Niobium Microsystems | Specialized FHE Hardware | Cloud and AI infrastructure | 8nm Samsung Foundry (In development) |
| Optalysics | Photonic Computing | Compute-intensive transforms | 7th gen photonic chip (2-3 years to market) |
| Duality Technology | FHE Software/Queries | Machine learning and LLMs | Software-centric |
The development of these chips represents what Sanu Mathew describes as “the start of a whole journey,” comparable to the early days of the first microprocessors. As FHE moves from research labs to commercial data centers, the ability to process sensitive information—ranging from medical records to financial data—without ever decrypting it could redefine digital privacy.
Intel is expected to continue refining its approach by fine-tuning software and exploring even larger FHE problems for potential next-generation hardware. No official commercial release date for the Heracles chip has been announced.
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